Radio-Frequency Multiply-and-Accumulate Operations with Spintronic Synapses
نویسندگان
چکیده
Exploiting the physics of nanoelectronic devices is a major lead for implementing compact, fast, and energy efficient artificial intelligence. In this work, we propose an original road in direction, where assemblies spintronic resonators used as synapses can classify an-alogue radio-frequency signals directly without digitalization. The convert ra-dio-frequency input into direct voltages through spin-diode effect. process, they multiply by synaptic weight, which depends on their resonance fre-quency. We demonstrate physical simulations with parameters extracted from exper-imental that frequency-multiplexed implement corner-stone operation neural networks, Multiply-And-Accumulate (MAC), microwave inputs. results show even non-ideal realistic model, outputs obtained our architecture remain comparable to traditional MAC operation. Us-ing conventional machine learning framework augmented equations describing resonators, train single layer network radio-fre-quency encoding 8x8 pixel handwritten digits pictures. recognizes accuracy 99.96 %, equivalent purely software net-works. This implementation offers promising solution low-power classification applications, new building block deep
منابع مشابه
Low Power Multiply Accumulate Unit (MAC) for DSP Applications
Wireless Sensor Network (WSN) presents significant challenges for the application of distributed signal processing and distributed control. These systems will challenge us to apply appropriate techniques to construct capable processing units with sensing nodes considering energy constraints. Digital Signal Processing (DSP) is one of the capable processing units, but it is not commonly used in W...
متن کاملReduced Redundant Arithmetic Applied on Low Power Multiply-Accumulate Units
We propose a new redundant approach on designing multiply-accumulate units for low power. State of the art implementations make use of redundant registers to obtain low delay times by moving any carry propagate adder out of the operation cycle. Our contribution is optimizing the level of redundancy by adjusting the size of the carry register. This optimization is performed by a VHDL generator, ...
متن کاملDesign of Efficient Reversible Multiply Accumulate (MAC) Unit
The multiplication and accumulation are the vital operations involved in almost all the Digital Signal Processing applications. Consequently, there is a demand for high speed processors having dedicated hardware to enhance the speed with which these multiplications and accumulations are performed. In the present conventional circuits, the multiply accumulate unit multiplies the two operands, ad...
متن کاملMultiply & Accumulate Unit Using RNS Algorithm & Vedic Mathematics: A Review
High speed execution of arithmetic operations and high degree of precision in real time system are of major concern in any digital signal processing (DSP). Speed of DSP depends on speed of multiplier and algorithm used. In this paper we propose Residue Number System method for fast “carry free” floating point arithmetic operations. Floating Point RNS units have obvious advantages over tradition...
متن کاملNULL convention multiply and accumulate unit with conditional rounding, scaling, and saturation
Approaches for maximizing throughput of self-timed multiply-accumulate units (MACs) are developed and assessed using the NULL Convention Logic (NCL) paradigm. In this class of self-timed circuits, the functional correctness is independent of any delays in circuit elements, through circuit construction, and independent of any wire delays, through the isochronic fork assumption [1, 2], where wire...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Physical review applied
سال: 2021
ISSN: ['2331-7043', '2331-7019']
DOI: https://doi.org/10.1103/physrevapplied.15.034067